Internships
Synopsys | Intern, Technical Engineer | Bangalore, India
Aug 2022 - May 2023
- Gained a solid understanding of the complete ASIC design process from RTL coding to physical layout.
- Synthesis and verification.
- Physical design.
- Timing and Power Analysis.
- TCL scripting: Wrote and leveraged TCL scripts to automate tasks.
Oct 2021 - Dec 2021
Basic Electronics Fundamentals: Gained a foundational understanding of electronic circuits, components, and their operations.
Maven Silicon | Intern | Bangalore, India
Certificates
SWAYAM, NPTEL Certified courses
Hardware modeling using Verilog.
VLSI Design flow RTL to GDS
COURSERA